FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6355 Discussions

Access DDR3 DRAM sent through PCIex from DE2-i150

ZLiao3
Beginner
1,075 Views

Hi all,

 

I am currently working on a hardware project thatruns on DE2i-150. Hope there is anyone can help me on my problems written below. 

 

I would like to access the SODIMM DDR3 module on the board and I found that this module is connected to the Atom N2600 processor. The Atom N2600 subsystem is connected with FPGA through a PCIex bus. So my question is how should I access the DRAM module? I would like to write and read the DRAM module by addresses and would like to manually setting the DRAM timing parameters. But I am not familiar with such sub-system. Could you please give me some advice or share some experience?

 

Thanks.

 

 image.png

0 Kudos
1 Solution
BoonT_Intel
Moderator
394 Views

Hi Sir,

 

From the diagram, the DDR3 SODIMM seem like is direct connect to ATOM processor without pass through the FPGA. Therefore, no FPGA design is need here to let the ATOM processor to access the DDR3. Also, this is not Intel PSG (Altera) board, but it is Terasic board, please contact Terasic for further support.

 

Thanks

View solution in original post

0 Kudos
1 Reply
BoonT_Intel
Moderator
395 Views

Hi Sir,

 

From the diagram, the DDR3 SODIMM seem like is direct connect to ATOM processor without pass through the FPGA. Therefore, no FPGA design is need here to let the ATOM processor to access the DDR3. Also, this is not Intel PSG (Altera) board, but it is Terasic board, please contact Terasic for further support.

 

Thanks

0 Kudos
Reply