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After reconfiguration the phase of a PLL, The oscilloscope can't detect the change

LZhao1
Partner
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Perform a dynamic reconfiguration to a PLL to change phase refer to AN661, we can see a correct function in both simulation and STP, but when output the clock to a FPGA pin, use a oscilloscope to monitor,cannot find any change on oscilloscope screen.

STP.jpgsimulation.jpg

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Rahul_S_Intel1
Employee
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Hi ,

I got the update the above issue got resolved, let me know still you need further support

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