Agilex 5 GTS MCDMA at AXI-MM mode not working

[danield17]

I am using Quartus 25.1 and wanted to test the new GTS MCDMA for Agilex 5 in AXI-MM mode.
I generated the example design, which uses AXI-ST mode, and tested it with the provided driver. Everything worked fine—the device was identified, and the driver functioned correctly with the user application called "perfq_app". According to the user guide, this is referred to as the "Custom Driver."

The next step I took was to switch from AXI-ST to AXI-MM, but now the driver doesn't work.
I compared the provided code with the example design code for Agilex 7 MCDMA. The only differences I found were two macros: one for the data width and the other to indicate which example design it is.

I generated the AXI MCDMA example design at memory mapped mode for the Agilex 7 and use the provided code and it worked fine.

(On the left is the Agilex 5 provided code, and on the right is the Agilex 7 version.)

I tried changing IFC_QDMA_ST_LOOPBACK to IFC_QDMA_MM_LOOPBACK, but it didn’t help.

I even connected Signal Tap to the DMA MM master interface and saw that no transactions were occurring on this interface.

Has anyone encountered this issue or have any idea how to solve it?

[RongYuan]

Hi,

Agilex 5 AXI-S MCDMA and Agilex 7 AXI-MM MCDMA designs are very different. The PCIe IP and supporting modules in Agilex 5 MCDMA are all streaming interfaces. Simply replacing one ST interface with a MM interface doesn't work. You'll need to do a ST-to-MM translation and modify all supporting modules to MM interface.

The screenshot you showed is part of the c code which is not helpful for your purpose. After you redesign the structure (from ST to MM), ideally you can run the original test code and see it works as usual.

Regards,

Rong

[danield17]

Hi Rong,

After investigating the GTS MCDMA IP for Agilex 5, I identified the reason it wasn't working for me in AXI-MM mode.

The GTS MCDMA does support AXI-MM mode and even provides this interface when generating the IP in Qsys. There's no need for an ST-to-MM translation to use the memory-mapped interface.

Additionally, the Agilex 5 GTS MCDMA works with the same driver as the Agilex 7 MCDMA, requiring only minor modifications to adapt it to the interface and example design in use.

It appears there may be a bug in the IP, which I was able to resolve. I've already notified Intel about the issue.

Best regards,
Daniel

[RongYuan]

Hi Daniel,

Thanks for the feedback of trying this out. Example design can only be generated based on AXI-S for Agilex 5 so your findings here provide an alternative way to use Agilex 5.

Regards,

Rong