FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

Arria 10 40GbE MAC IP

Honored Contributor II



I am using 2 instances of Arria10 40GbE MAC IPs in my design. I have tuned the transceiver PMA settings and see that both the links are up. But in some builds, I see that either of the 2 links doesnt work. When I re-build using a different SEED value, both start working. When both the links in a build works, it always works. When one fails, it always fails. Even in case of failing link, the CDR and PLL statuses are all ok (this is based on register read from IP, not sure if the CDR loses lock intermittently) 


- is it likely that the tuning is marginal, needs re-tuning 

- or could there be some timing issue (but there are no MAC related violations in STA report) 


I have used the reference design that came with the IP, and connected the same ATX PLL clock output to both the IP instances. The SDC also came with the reference design. 


I presume that there is no problem in transmission, as, when I connect the failing link's TX to the passing link's RX, it still works. 


Looking for inputs on how to debug.  


0 Kudos
0 Replies