FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6424 Discussions

Arria 10/Cyclone 10 Transceiver

SKara
Beginner
691 Views

I am using the "Transceiver Native PHY Intel Arria 10/Cyclone 10 FPGA IP" and set "adaptation enabled" in the DFE mode.

In this mode, will the DFE tap be always calibrated automatically or do we need to write some registers to initialize the calibration each time?

If we need to write to some register, could you please send us a reference?

0 Kudos
1 Reply
Deshi_Intel
Moderator
319 Views
Hi Serge, User needs to trigger the DFE adaptation via some register write. You can refer to Arria 10 transceiver phy user guide doc page (464/465) for the instruction on how to do it. https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/arria-10/ug_arria10_xcvr_phy.pdf Thanks. Regards, dlim
0 Kudos
Reply