FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
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Arria 10 PCIe SRIOV IP

agula
New Contributor I
902 Views

Hello  ,

I am using the SRIOV PCIe IP core. When I write 32-bit DWs into the host memory from the endpoint, some of them get stuck. For example , I see the write request at the correct address go out on the bus, but the host memory does not show these changes until more writes are performed. So if its the last write to the host software, this will never show up. I am using a dma_alloc_coherent for all shared space between FPGA and system software.  Does anybody know what could be causing these issues. Seems very strange and I cannot pinpoint an issue.

 

Thank you! 

 

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agula
New Contributor I
858 Views

Solved issues thanks for the reply. The tx empty encoding was incorrect on one of the writes. 

View solution in original post

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4 Replies
KhaiChein_Y_Intel
881 Views

Hi,


What device you are using? Have you tried checking using signal tap? Are all the signals correct from the STP?


Thanks

Best regards,

KhaiY


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KhaiChein_Y_Intel
868 Views

Hi,


We do not receive any response from you to the previous question/reply/answer that I have provided. This thread will be transitioned to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you


Best regards,

KhaiY


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agula
New Contributor I
859 Views

Solved issues thanks for the reply. The tx empty encoding was incorrect on one of the writes. 

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mark_lee
New Contributor I
765 Views

Hi agula

           do you have the a10 sriov driver for linux ?

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