I am using the SRIOV PCIe IP core. When I write 32-bit DWs into the host memory from the endpoint, some of them get stuck. For example , I see the write request at the correct address go out on the bus, but the host memory does not show these changes until more writes are performed. So if its the last write to the host software, this will never show up. I am using a dma_alloc_coherent for all shared space between FPGA and system software. Does anybody know what could be causing these issues. Seems very strange and I cannot pinpoint an issue.
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