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Arria GX + PCI express IP card powers down the PC, instead of just restarting.

Altera_Forum
Honored Contributor II
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Hi, 

 

I'm using Quartus-II 8.0 sp1 and PCI express soft IP core on Arria GX device. Card sits on a x4 slot of an Intel quad-core motherboard running Windows XP. I have a custom driver which communicates with the PCIe card. We have custom Avalon modules in SOPC, along with DMA, DDR2 and PCIe IP.  

 

After downloading the SOF file via USB Blaster I initiate Windows "Restart". But instead of restarting, the PC shuts the power down and few seconds later, powers up. Sometimes, this power-cycling continues and I have to turn off the main power.  

 

The frustrating part is that, before I made minor behavioral changes to one of the custom Avalon modules in SOPC, the SOF file was okay - no PC powerdowns.  

 

Has anyone seen this kind of problem? any work arounds? Thanks,
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Altera_Forum
Honored Contributor II
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Check that the PCIe reset pin is defined and used, rather that not defined and defaulted to output driving low. I have also seen the power-cycling thing happen when i have a card plugged into certain spots but not programmed. My best guess is an impedance matching issue of the card in config mode and the pcie trying to detect receivers, but it only happens sometimes in certain slots and then only sometimes. Also make sure you don't have a bootloader that is reloading images when you try and use the jtag. Let us know what you come up with. 

 

Also you can go back to a version that worked and work your way up with the changes and see if any break it, although it seems to be a more root level problem rather than a higher level core functional change. 

 

kevin
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Altera_Forum
Honored Contributor II
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Hi Kevin, 

 

Those are good points. Checked the reset pin and impedance matching issues you mentioned and found them to be conforming. Our vendor also verified impedance characteristics of PCIe traces.  

 

The issue happens randomly. Sometimes after adding a node to the SignalTap-II and sometimes after adding a seemingly innocuous line of verilog code (like an assignment) to a state-machine of a custom Avalon module.  

 

I don't know if moving to Quartus 9.0 (we're on 8.0 sp1) would resolve the issue; but that is one option we are considering.  

 

regards, 

-swguy
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Altera_Forum
Honored Contributor II
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check board setting,first!

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