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Avalon Slave supporting burst

Altera_Forum
Honored Contributor I
1,106 Views

Hi to everybody!! 

 

I am trying to develop a slave able to support burst transfers. Everithing seems to work except the fact that when the burst transfer is done via DMA, it increments the address for every cycle instead of accessing always to the same position. I want to do burst on a single memory position Is it that possible? If the answer is YES, why the DMA increment the address if I am programming it to work with peripheral? Is there any relation between the Avalon signals implemented and this funny behaviour? I just implemented the flow control signals (Datavalid and waitrequest) 

 

Best regards and thank you in advance!!!! 

 

Ricardo
0 Kudos
2 Replies
Altera_Forum
Honored Contributor I
104 Views

That would be a property of the dma controller. 

An alternate options is to not decode the low address bits on your data fifo.
Altera_Forum
Honored Contributor I
104 Views

Yes, I already considered this option. However I do not like it because you have to expand the assigned memmory space.

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