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Basic IP Question

Altera_Forum
Honored Contributor II
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I have a design that uses the Nios II core. I contacted a rep about the need to license this bit of IP and he said that if I used the "e" version then there is no license fee; other wise it is $495. 

 

Is this correct?  

 

When I download my project to the DE0 eval board I get a pop-up window that says my sof file contains one or more time limited mega functions. 

 

The message window says: 

 

Info (210040): SRAM Object File C:/FPGA/rev1/UAT_REV1_TOP_time_limited.sof contains time-limited megafunction that supports OpenCore Plus feature -- Vendor: 0x6AF7, Product: 0x00A2 

 

Is this the NIOS core or another megafunction? 

 

Confused. 

 

Thanks for the help. 

 

Rich
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Altera_Forum
Honored Contributor II
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the -e no longer required a license as of 10.0 or so. using older versions would require a Nios II license 

 

indeed, that's the Nios core causing the Time Limited behavior: 

 

6AF7_00A2 Nios II Embedded Processor Encrypted output
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

the -e no longer required a license as of 10.0 or so. using older versions would require a Nios II license 

 

indeed, that's the Nios core causing the Time Limited behavior: 

 

6AF7_00A2 Nios II Embedded Processor Encrypted output 

--- Quote End ---  

 

 

OK that is good news. Any idea why I still get the time limited message/behavior after switching the nios type to /e? 

 

Thanks 

 

Rich
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Altera_Forum
Honored Contributor II
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did you regenerate the SOPC/Qsys system after changing the Nios to /e? simply recompiling in Quartus will not complete the change

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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

did you regenerate the SOPC/Qsys system after changing the Nios to /e? simply recompiling in Quartus will not complete the change 

--- Quote End ---  

 

 

I did. It still gives the "time limited" message, though the time is unlimited. The programmer pop-up window must still be open for the code to run. 

 

Are you sure it is the nios core? I am also using on-chip memory, jtag uart, serial uart, system id, and parallel IO. 

 

Thanks for the help 

 

Rich
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Altera_Forum
Honored Contributor II
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you get unlimited time as long as the USB Blaster is connected to the board and computer. as soon as it disconnects I think you have about an hour 

 

none of those IP require a license, its definitely the Nios. perhaps start a test design from scratch?
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Altera_Forum
Honored Contributor II
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--- Quote Start ---  

you get unlimited time as long as the USB Blaster is connected to the board and computer. as soon as it disconnects I think you have about an hour 

 

none of those IP require a license, its definitely the Nios. perhaps start a test design from scratch? 

--- Quote End ---  

 

 

OK, perhaps I am confused. Do I need a license to run NIOS with the cable disconnected? It is working fine with the cable connected. 

 

Rich
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Altera_Forum
Honored Contributor II
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Hello , i want to send data to my ethernet controller on my 

FPGA(cyclone) board of Altera. 

What algorithm of sending data via this interface ?? What first steps i 

need to do in order to accomplish this mission. Maybe someone can advise 

me some book that can help me in this project. 

Thanks.
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Altera_Forum
Honored Contributor II
263 Views

Are you using a recent version of Quartus? As thepankake said you need at least Quartus 10.0 to be able to use the /e core without license.

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Altera_Forum
Honored Contributor II
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qqq: please start a new thread with your question 

 

rich: sorry for the added confusion. the /e which does not require a license doesn't need to be connected via USB Blaster ever 

 

any IP that supports OpenCore Plus can be evaluated indefinitely in hardware while connected to the PC, or for an hour when it's not connected to the PC 

 

if you are using 10.0+ and /e is giving you the time limited windows and warnings, something is wrong
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