Basic work flow question on Altera DSP Builder

[Altera_Forum]

Hello all,  

 OK so far I have created a model in Simulink then after that was working I implemented the same model using Altera DSP Builder Advanced Blockset.  I followed the Design Guidelines and used a top down design and included all of the required blocks  (Control, Signals, Run Quartus II, Run Modelsim blocks on testbench level)  (Device Block and Primitive subsystem on same level) (used ChannelIn, Channel Out, and SynthesisInfo block on my primitive subsystem level which uses modelprim blocks)  Everything runs in simulink and generates RTL Code.  I guess I'm just not sure what to do from here...   From my understanding the next thing I want to do is test the code in Modelsim? and then after that do something in Quartus II?  I'm not sure... Help would be greatly appreciated!  Thank you

[Altera_Forum]

--- Quote Start ---  Hello all,   OK so far I have created a model in Simulink then after that was working I implemented the same model using Altera DSP Builder Advanced Blockset.  I followed the Design Guidelines and used a top down design and included all of the required blocks  (Control, Signals, Run Quartus II, Run Modelsim blocks on testbench level)  (Device Block and Primitive subsystem on same level) (used ChannelIn, Channel Out, and SynthesisInfo block on my primitive subsystem level which uses modelprim blocks)  Everything runs in simulink and generates RTL Code.  I guess I'm just not sure what to do from here...   From my understanding the next thing I want to do is test the code in Modelsim? and then after that do something in Quartus II?  I'm not sure... Help would be greatly appreciated!  Thank you  --- Quote End ---    once blocks are connected you run it to generate hdl. Additionally you can run modelsim block to see if it passes. You can also run quartus block which runs a ready project. If your project is all done in simulink and you are not going to add extras then your project is ready and all you need is assign pins. If you want top level project to call dspbuilder hdl then you add the relevant files to your project.

[Altera_Forum]

Thank you for your reply! 

 OK so I built everything in Simulink using the DSP Builder blocks and everything builds and checks there with no problems.  When I go to Quartus and compile it always gets to 11% and then stops and never gets past that.  Did I miss a step? Is there something I need to do before compiling my code in Quartus?  Thanks again.

[Altera_Forum]

--- Quote Start ---  Thank you for your reply!  OK so I built everything in Simulink using the DSP Builder blocks and everything builds and checks there with no problems.  When I go to Quartus and compile it always gets to 11% and then stops and never gets past that.  Did I miss a step? Is there something I need to do before compiling my code in Quartus?  Thanks again.  --- Quote End ---    Qauartus should be helpful and tell you why. Do you run quartus from its block or have you got a top level your own project then added all required files from dspbuilder to your quartus project.   It could simple issue: if you click quartus block in simulink it then opens and loads project then it is up to you to click on run button.

[Altera_Forum]

--- Quote Start ---  Qauartus should be helpful and tell you why. Do you run quartus from its block or have you got a top level your own project then added all required files from dspbuilder to your quartus project.   It could simple issue: if you click quartus block in simulink it then opens and loads project then it is up to you to click on run button.  --- Quote End ---    Yes I run Quartus from the "Run Quartus" Block in Simulink. Then try to compile in quartus and it never gets past 11%

[Altera_Forum]

--- Quote Start ---  Yes I run Quartus from the "Run Quartus" Block in Simulink. Then try to compile in quartus and it never gets past 11%  --- Quote End ---    At least you are given 11% ! It sounds like tool setup issue. I have never encountered that. I assume you click on the compile button then it runs and sees files. You should trace the messages of compilation then you will spot why it is waiting.  Licence issues, clear all your work and restart and that sort of playing with tools else you better destroy your pc and but a new one.

[Altera_Forum]

OK I think I have discovered my problem and maybe you (or anyone) can help. 

 The data I am putting in and sending out is 100x1 double (a column of 100 values). It seems that Quartus is trying to assign a pin to each of the 100 values for the output. At least thats what I think is going on... hmm.