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HBhat2
New Contributor II
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Bit Slip logic implementation for Stratix 10 Native PHY with PCS Direct mode

Hi,

 

As I understood the Native PHY IP for Stratix 10 transceivers, PCS Direct doesn't enable bit slip logic for data alignment on the receiver side. Is there any guidelines to implement Word alignment/ bit slip logic for PCS Direct mode?

 

With Regards,

HPB

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Nathan_R_Intel
Employee
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Hie, Please have my apologies as i missed updating your case. I had a few PCS direct question, that I missed updating this case. Yes you are correct, PCS direct does not enable data alignment logic on the receiver side. As for guideline, currently Intel does not have any. Regards, Nathan
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