CTO value can't be changed. If so what's the default CTO value?
>> I do not have a default value for the completion time out
2)Completion Timeout won't happen. So the P-Tile IP for PCIe will wait for the response indefinitely
No, Timeout will happen, the time out is implemented in HIP ( Hard Ip)
Only difference from other family of Intel FPGA devices is that , customer cannot change the Time out value ,. The Time out will happen by the default value in HIP.