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CRC Compiler Settings

Altera_Forum
Honored Contributor II
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Hey, I am trying to use the CRC compiler to verify the CRC for the MAC level of ethernet. I am unable to simulate a version that matches an actual message. The Altera documentation does not provide any hint of the right configuration. I am using it with a 32-bit word input. 

 

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Altera_Forum
Honored Contributor II
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I figured out the proper settings, see below. This is for byte wide input. 

 

Number of channels: one 

Datapath: 8 bits 

Symbols per word: one 

Process low-numbered bit in each symbol first: check 

Processing low-numbered symbols first: not checked 

Select: CRC-32 

Starting value: 1's 

Number of leading bits ignored in the first word: 0 

Negate checksum: Check 

Bit-swap checksum: Check
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Altera_Forum
Honored Contributor II
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Hi, 

I am trying to integrate CRC-CCITT into my Cyclone III design. It synthesizes etc fine but if I add the input and outputs of the core to my SignalTap design, I start getting instance mismatch error, i.e., 'Not compatible with the device'. Could someone please shed light on why this may be happening. Just to clarify, the FPGA is in un-tethered mode (its on a board with no internet access). 

 

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