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hi
im using the HP DDR2 controller with 5 discrete DDR2 components (4+1 ECC) i get an error during calibration.. when i looked at the write & read cycles i saw that i write the same pattrern as the simulation but i cant read the exact data. the simulation is OK but in real life i read one bit less at the start of the data & one bit less at the end.. ive gone over all the controls (cas,RAS,CS,CKE,ODT) & the CK,CK~.. i really am stuck.. is there any idea?? im attaching the wr & rd cycles during calibration - will attach later thnxLink Copied
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