In our pcb design we use the Cypress S25FS256S flash device. I would like to use this flash to boot a nios ii application, hex file. In order to do that I need to be able to use the Generic QUAR SPI controller II with the cypress flash but its not on the supported devices list for the Generic QUAR SPI controller II.
Can I get support for more flash devices for the Generic QUAR SPI controller II IP core or is there any other way to access the cypress flash on the avalon instruction and data bus for the nios ii processor?
QUAD SPI controller II is officially supporting those flash devices available in the IP list, ie more specifically EPCQ and Micron https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_embedded_ip.pdf, 22.1.1. Sorry to tell that we could not evaluate other various flash in the market. You could try to evaluate it when you have the board as that flash may be compatible . Are you considering to implement supported flash from the list which has the same footprint just in case it is fail to boot up?
I have tried to use the QUAD SPI contoller II with the Cypress S25FS256S flash device but it did not work. Although on the datasheets I fould out that these flash memories have common commands. I also tried to boot from another supported flash from a development board just to check my program and my settings and it worked fine. So it looks that the Cypress wont work with the QUAD SPI contoller II.
Please try on new IP generic serial flash interface https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-gen-sfi.pdf. It is not specific to any type of flash but currently does not have any NIOS HAL support. After that in NIOS Eclipse, generate HEX with boot copier using "mem_init_generate" tool. Hope this workaround can help.
I tried to boot nios application using the Generic Serial Flash Interface Intel FPGA IP Core as you suggested, but the "mem_init_generate" tool does not generate a HEX file for the flash memory as usually does with other type of memory controller core. Do you think this is because there is no NIOS HAL support?
I order to set up the system that i described above I am using a max10 fpga and I have followed the instrunctions on the "AN 730: Nios II Processor Booting
Methods in MAX 10 FPGA Devices" document. I am using the boot option 4 as described to the document but instead of the QSPI controller I tried the Generic Serial Flash Interface Intel FPGA IP Core.