Can anybody tech me what is the detail of the local_address in the DDR2 ug

[Altera_Forum]

I have looked in every DDR2 documents,but can't find the detail of the local_address. 

I just know that local_address which include the columns,the rows,the banks.but i know know the order.  Thanks in advance

[Altera_Forum]

i find a document called "ddr and ddr2 sdram high-performance controllor user gude",it descript the local_address.