Honored Contributor II
08-14-2013 03:47 PM
I have searched for ddr and NIOS and cannot find anything appropriate on the forums.If someone knows of a similar question/solution, please just let me know. --- I have some changes I'd like to make to the file sequencer.c before it is used *inside* the DDR3 IP in a Stratix V Device. I'm currently achieving this by changing the file inside the tool tree, but this makes tracking hard. I'm referring to the file .../13.0sp1/ip/altera/alt_mem_if/altera_mem_if_qseq/software_110/sequencer_c/sequencer.c My flow at the moment is 3 phases on the command line:
- to generate all files from QSYS files from the command line using:
- > qsys-generate system.qsys --synthesis=VERILOG
- Build the qsf from a TCL script, (exported and modified from quartus).
- Using quartus_sh and "execute_flow -compile"
$ find system_ddr3_0* -type f | egrep -v "\.v|\.sv" system_ddr3_0_p0_parameters.tcl system_ddr3_0_p0_pin_assignments.tcl system_ddr3_0_p0_pin_map.tcl system_ddr3_0_p0.ppf system_ddr3_0_p0_report_timing_core.tcl system_ddr3_0_p0_report_timing.tcl system_ddr3_0_p0.sdc system_ddr3_0_p0_timing.tcl system_ddr3_0_s0_AC_ROM.hex system_ddr3_0_s0_inst_ROM.hex system_ddr3_0_s0_make_qsys_seq.tcl system_ddr3_0_s0_sequencer_mem.hex system_ddr3_0_s0_software/core_debug.h system_ddr3_0_s0_software/sequencer.c system_ddr3_0_s0_software/sequencer.h system_ddr3_0_s0_software/core_debug_defines.h system_ddr3_0_s0_software/sequencer_defines.hI'm pretty certain the "..._sequencer_mem.hex" is the file that is loaded, but how do I regenerate this outside of using the qsys-generate command? Ideally between steps 1) and 2) I want to change sequencer.c and rebuild the appropriate hex files in place... I think the file: "system_ddr3_0_s0_make_qsys_seq.tcl" might be part of the solution, but this copies over the sequencer.c from the original location again.... Can someone provide any guidance or direction? Many Thanks... [edited for formatting]