FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP

Cholesky algorithm IP

Altera_Forum
Honored Contributor II
1,198 Views

Hello, 

We're trying to use DSP Builder Cholesky algorithm (currntly we're simulating using ModelSim the Cholesky with your TB). 

In the entity there are 2 undocumented inputs: InUpper_s, ProcUpper_s. 

The TB change their logic level after 500 and 1000 clocks from the command start. 

1. What is there use? 

2. When we have to set reset these inputs?  

Thank you 

Shay
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
108 Views

Please see attachment. Port descriptions are in section 9.1. 

 

the _s means scalar (as opposed to _im or _re). 

 

Greg
Reply