FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6448 Discussions

Controling transceiver polarity in 10GBASE-R PHY IP

Altera_Forum
Honored Contributor II
‎02-24-2011 10:24 AM
958 Views

Is it possible to control the transceiver input/output polarity with the 10GBASE-R PHY IP? It seems to work with XAUI IP.

0 Kudos

Link Copied

0 Replies
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.