Create a VIP Component

[JLee25]

Hi,

Because of my project requirement, some of the VIP components will not work.

Therefore I would like to know how to build and create my own customized component for VIP suite.

Please help!

Thank you!

[Deshi_Intel]

HI,

Sorry but I don't quite understand your request here.

I presume you already have your own custom RTL design IP,

• you want to learn how to connect to Intel FPGA other VIP solution ?
• or you want to convert your custom design into QSYS IP component that can be added into platform designer ?
• or you are looking for design service to help you build custom IP solution ?

can you elaborate further on your ASK here ?

Thanks.

Regards,

dlim

[JLee25]

Hi Dlim,

I want to convert my custom design as a Video Image Processing component which can connect to other Video Image Processing components .

Thank you!

BRs,

Johnson

[Deshi_Intel]

Hi Johnson,

Intel FPGA VIP solution suite typically use either

• industrial standard video interface bus
• or Altera proprietary interface bus (like Avalon ST bus)

to interact with other design block

In this case, i think what you are asking is the spec of the Avalon ST bus so that you can integrate Avalon ST bus into your custom design to interact with Intel FPGA VIP solution suite

So, here go Avalon spec for your reference.

• https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/manual/mnl_avalon_spec.pdf

Thanks.

Regards,

dlim

[JLee25]

Hi Dlim,

Your understanding is correct.

Does intel has any reference design on this to share?

Teach how to do this like customer component for platform designer.

Thank you!

BRs,

Johnson

[Deshi_Intel]

Hi Johnson,

Sorry, I took back my word.

Pls refer to VIP user guide doc chapter 2 - Avalon Streaming Video as compare to generic Avalon spec that I shared with you earlier.

• The reason is due to VIP IP suite customized the generic Avalon ST interface bus to add in special design requirement like control packet and video packet data transfer.
• https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_vip.pdf

We don't have Avalon ST reference design. We do expect customer to study the spec and timing diagram and code the design themselves.

• I think the closest reference that you can refer to maybe is VIP suite - test pattern generator II. You can run sim on it to learn how the Avalon ST video transaction works.

Once you have finished developed your own Custom IP design, then you can refer to below doc (chapter 2.8) to learn how to add/build custom IP component in platform designer to integrate with other VIP suite.

• https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug-qpp-platform-designer...

Thanks.

Regards,

dlim

[JLee25]

Hi Dlim,

I got it.

Thank you for the information!

BRs,

Johnson

[Deshi_Intel]

Alright !

[Deshi_Intel]

Alright, I am setting this case to closure

Thanks.

Regards,

dlim