Hi,I would like to create an IP from a vhdl file that can be instantiated with the megawizard tool with some customizable parameters : - activate or not outputs - change generic parameters The purpose is to use the user friendly interface of Megawizard to symplify instanciation. I would like a result such as the PLL IP for example. Is it possible ? Thanks, Sebastien G.
you can do this in SOPCB/Qsys easily. when you create a custom component you can control generics in the GUIto make something work in the MegaWizard is a lot more work. i think its Java based, you'll have to find out through the AMPP program: http://www.altera.com/products/ip/ampp.html
I took a look at creating a megafunction a while back and decided to go with the hardware .tcl (SOPC Builder/Qsys) infrastructure instead for these reasons:1) I prefer microcore based design which you can only do in SOPCB/Qsys 2) It was much easier to write the .tcl code than it would be to write the java code needed for megafunctions (coming from someone who hates .tcl that says a lot) 3) I'm a strong believer in standard interfaces (Avalon) for IP reuse and making my life easier whereas with a megafunction if you are going to use standard interfaces you might as well use a system integration tool at that point (SOPCB/Qsys) 4) I hate writing testbenches, using standard interfaces I can bolt BFMs up to them and get through my verification a lot faster (or sometimes just bolt Nios II up to it and test it using C code) There are more reasons but I think you get the picture :)
I should also say that parameterization is easy to do using the .tcl API. Component editor will detect your generics/parameters and make them editable. Sometimes I hand modify the .tcl file after component editor is done writing it out to make fancy parameters like radio buttons, pulldowns, update the valid parameter selections, grey out selections based on other parameters, etc... To enable/disable interfaces or ports you can add callbacks to your .tcl file (start with Component editor first since it'll get you 90% the way there) and add the extra code to do this based on the parameterization.Most of what you are looking for is probably in one of the cores in this design. There is a lot of parameterization stuff going on in those so don't scared by my gnarly code :)
thanks for replies.I give up the idea to automatize IP instantiation. The idea was to gain time and to make more simple their use by people who don't know how their works. So I think that a simple vhd file with some text indications about instantiation/use OR .tcl generated by sopcB for core application is the simple way to manage IP. A simple tool to generate user friendly interfaces for IP could be a great feature for the next quartus release !
Oops when referring to an example a link would help.... http://www.alterawiki.com/wiki/modular_sgdmaWhen designing IP I recommend starting by thinking of the interfaces first while the logic is being planned. I think of interfaces much like software developers plan APIs and if you stick to a standard then integration becomes much easier.
very interesting link. Right now I have only used simple custom IPs with the nios, but your example will certainly help me a lot for future applications.thanks again !