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5741 Discussions

Cyclone 10 GX ASMI Parallel IP debug

jlats2
New Contributor I
240 Views

Hello,

I am attempting to implement the ASMI Parallel IP on my Cyclone 10 GX. I am able to perform sector erases and reads just fine (I can erase everything and read back all FF's).  However when I attempt to perform multiple page writes, I see my busy signal being asserted as soon as the I attempt to shift in new bytes.  Below is a sketch of what I am seeing on signaltap:

jlats2_0-1634303855298.png

Based on the datasheet, I do not believe that I should be seeing the busy signal go HI until I assert the write signal. I have the en4b_addr always asserted as I always want to be using 4 byte addressing. My first question is, could having en4b_addr  set to HI be causing the IP to beleive that I am enabling en4b_addr  as opposed to shifting in pages (data_in)?

 

Furthermore, should I be enabling en4b_addr once, or before every page write operation?

 

The user guide that I have been referencing is here: https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_altasmi_parallel.pdf

 

My Flash Memory chip is here: https://media-www.micron.com/-/media/client/global/documents/products/data-sheet/nor-flash/serial-no...

 

Thank you very much for any assistance.

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1 Solution
jlats2
New Contributor I
202 Views

Responding to myself for the benefit of future readers:

 

Do not leave the pin high. Strobe en4b_addr once, possibly during your boot up process, and keep it low.

If you have en4b_addr  HI when you attempt to perform a shift, the en4b_addr command appears to be set in preference over shift operations.

View solution in original post

3 Replies
jlats2
New Contributor I
203 Views

Responding to myself for the benefit of future readers:

 

Do not leave the pin high. Strobe en4b_addr once, possibly during your boot up process, and keep it low.

If you have en4b_addr  HI when you attempt to perform a shift, the en4b_addr command appears to be set in preference over shift operations.

View solution in original post

NurAiman_M_Intel
Employee
173 Views

Hi,


Apologize for the delay in response as I just receive notification today.


Thank you for sharing with us your answer. If this case has been solved, I will proceed to close this ticket.


Regards,

Aiman


jlats2
New Contributor I
161 Views

No worries, thank you for your response.

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