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Altera_Forum
Honored Contributor I
1,812 Views

Cyclone V Hard memory controller rate

Hi, I am using Cyclone V which has 2 Hard memory controllers. When I tried to generate DDR3 memory controller with Uniphy I was not able to select Half or Quarter rate on Avalon-MM interface. Then I came to know that hard memory interface supports only full-rate controller mode. I want to run local interface at lower rate(Quarter/Half) with higher data width. How to do this when I am using Hard memory controller?

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6 Replies
Altera_Forum
Honored Contributor I
41 Views

What speed are you trying to run the external memory at and what data width?

Altera_Forum
Honored Contributor I
41 Views

 

--- Quote Start ---  

What speed are you trying to run the external memory at and what data width? 

--- Quote End ---  

 

I want to run external memory at 400Mhz or 500Mhz and its a 32 bit memory.
Altera_Forum
Honored Contributor I
41 Views

Use this tool to see what is possible: 

 

https://www.altera.com/products/intellectual-property/best-in-class-ip/external-memory/support-selec... 

 

Looks like 400MHz is possible depending on speed grade, but that's the max.
Altera_Forum
Honored Contributor I
41 Views

 

--- Quote Start ---  

Use this tool to see what is possible: 

 

https://www.altera.com/products/intellectual-property/best-in-class-ip/external-memory/support-selec... 

 

Looks like 400MHz is possible depending on speed grade, but that's the max. 

--- Quote End ---  

 

 

Thanks rsefton. Is there any way to run my local interface at lower rate when I am using Hard memory controller?
Altera_Forum
Honored Contributor I
41 Views

As you pointed out above, the Cyclone V hard controller only supports a full-rate local interface. So the answer is no. And you can't go wider because the hard controller only supports up to 40 bits. Maybe jump to the Arria family?

Altera_Forum
Honored Contributor I
41 Views

Cyclone HMC only support full-rate and this cannot be change. However, the HMC have the multiport front end component between the controller and user logic and this MPFE is allow lower frequency than full rate. 

See the Multi-Port Front End (MPFE) section of this document for details. 

https://www.altera.com/documentation/hco1416493470528.html#hco1416493209306 

 

focus on this paragraph: 

The fabric interface provides communication between the Avalon-ST-like internal protocol of the hard memory interface and the external Avalon-MM protocol. The fabric interface supports frequencies in the range of 10 MHz to one-half of the memory interface frequency. For example, for an interface running at 533 MHz, the maximum user logic frequency is 267 MHz. The MPFE handles the clock crossing between user logic and the hard memory interface. 

 

(This message was posted on behalf of Intel Corporation)
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