Cyclone V PCIe Hard IP compatibility question

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Cyclone V PCIe Hard IP compatibility question

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Hi there

This question is probably more of a PCIe question than simply being restricted to the Cyclone V, but I would like to know if anyone has any insight or experience with the issue at hand:

I am using an NXP processor that is specified to be compatible with PCIe base specification 2.0. I want to interface it with the Cyclone V PCIe hard IP which is specified to be compatible with PCIe base specification 2.1 and PCIe base specification 3.0.

According to my understanding, PCIe is both forwards and backwards compatible and this should not be a problem at all, but I would like to find out from anyone who might have used such a setup if there are any specific design or implementation problems that might be necessary to consider.

Thanks in advance

stu84

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