FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5880 Discussions

DDR Calibration VS T°C VS MEM_CLK_FREQ

Daracus
Beginner
155 Views

Hello

I have an issue with the Calibration Status, with the ip : "LPDDR2 SDRAM Controller with UniPHY."Version 15.1.

Condition low tempereture (-20°C  -4°F):

If I set a MEM_CLK_FREQ = 300.0MHz, sometimes the calibration fails :

=> hmc_DDR_status_local_cal_fail goes high, 

=> hmc_DDR_status_local_cal_success goes low.

=> But If I set a MEM_CLK_FREQ = 400MHz, the calibration always seems OK (hundred tests).

I'd like to know, how the increase of MEM_CLK_FREQ will affect the DDR calibration process?

Thanks

0 Kudos
1 Reply
yoichiK_intel
Employee
121 Views

Did you check the memory timing parameter is correct one which you use on the board such as tINIT, tRFC,tREF ?

Reply