I'm trying to evaluate DDR2 ALTMEMPHY IP on Stratix II GX PCIe development board. I need to run DDR2 at 333MHz. According to external memory document, Stratix II GX can run upto 333MHz if ALTMEMPHY IP is used. At the moment, I'm using Quartus 9.0 to compile the example design that was generated from Megawizard. I was only able to run at 240MHz with this design. I'm also using AN328 as a reference. Based on AN328 instruction, I do have any timing errors. So, here are my questions:1. Does Megawizard generates all the timing constraints if you entered all the parameters within Megawizard? Do I need to provide any other timing constraints for the IP? 2. Is there any other constraints that I need to provide other than AN328? 3. Has anyone tried to run Stratix II GX to support 333MHz DDR2? Thanks, K.
3. We have 2 High Performance DDR2 Controllers (72bit Single Rank unbuffered DIMM) running at 300 MHz in a EP2SGX60F1152C3 device.We are using Quartus II 9.1 SP2.