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DDR2 Fitter(Place & Route) report errors

Altera_Forum
Honored Contributor II
895 Views

The FPGA is Cyclone IV EP4CE30F23C7, FBGA484-7 

And ddr2 parameters are as follow: 

https://alteraforum.com/forum/attachment.php?attachmentid=14289&stc=1  

https://www.alteraforum.com/forum/attachment.php?attachmentid=14290  

It reports as follows:  

https://alteraforum.com/forum/attachment.php?attachmentid=14291&stc=1  

 

Can anyone help me to solve this problem, thanks
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2 Replies
Altera_Forum
Honored Contributor II
85 Views

Have you checked the pin assignments in the Memory generator (ALTMEMPHY). Make sure the pin assignments do not conflict with other pin assignments in your project/board. I guess, you also need to choose a memory vendor aka Micron/Samsung/etc from the Memory vendor list so that you are targeting the correct memory chip. Each chip has its own timing parameters so be careful in selecting the vendor and chip carefully from the supported memory list.

Altera_Forum
Honored Contributor II
85 Views

Another way is to remove all pin location assignment for DDR2 pin and perform full compilation. Quartus will auto fit those pin accordingly that apply with the requirement. Then review the fitter report and compare it to your manual pin assignment.  

The fastest way is if the auto fitting location meeting your requirement, then you can eliminate your original pin location and use this new pin location. 

 

(This message was posted on behalf of Intel Corporation)
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