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DDR2 UniPhy OCT

Altera_Forum
Honored Contributor II
964 Views

Hi, 

I am using DDR2 Uniphy and get an Error on calibrated OCT: 

 

I run tcl after synthesis and tcl run successfully as qsf updated, for instance DDR IO constrained properly : 

 

"set_instance_assignment -name IO_STANDARD "SSTL-18 CLASS I" -to DDR2_DQ 

[*]set_instance_assignment -name INPUT_TERMINATION "PARALLEL 50 OHM WITH CALIBRATION" -to DDR2_DQ 

[*] -tag __mtx_st820_mem_if_ddr2_emif_0_p0 

set_instance_assignment -name OUTPUT_TERMINATION "SERIES 50 OHM WITHOUT CALIBRATION" -to DDR2_DQ 

[*] 

 

I get the following error: 

 

"Error (174068): Output buffer atom "mtx_st820:mtx_st820|mtx_st820_mem_if_ddr2_emif_0:mem_if_ddr2_emif_0|mtx_st820_mem_if_ddr2_emif_0_p0:p0|mtx_st820_mem_if_ddr2_emif_0_p0_memphy:umemphy|mtx_st820_mem_if_ddr2_emif_0_p0_new_io_pads:uio_pads|mtx_st820_mem_if_ddr2_emif_0_p0_altdqdqs:dq_ddio[0].ubidir_dq_dqs|altdq_dqs2_ddio_3reg_stratixiv:altdq_dqs2_inst|extra_output_pad_gen[0].obuf_1" has port "SERIESTERMINATIONCONTROL[0]" connected, but does not use calibrated on-chip termination" 

 

Why I getting this ERROR? 

 

Thanks
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3 Replies
Altera_Forum
Honored Contributor II
135 Views

Have you tried setting OUTPUT_TERMINATION "SERIES 50 OHM with CALIBRATION" instead? Your bidir DDR2_DQ have parallel termination with calibration during input, yet during outputs it doesn't use it.

Altera_Forum
Honored Contributor II
135 Views

Thanks, but I have tried and still getting the same errors...

Altera_Forum
Honored Contributor II
135 Views

Did you check if the assignments are ignored under Ignored Assignments?

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