Hi all,I have to update a board. The old design (Cyclone IV) used DDR2 Altmemphy running at 133MHz over 16 Bits. The new design (Arria V) will use DDR3 Uniphy with the Hard EMIF running at 533 MHz over 8 Bits. I want to reduce the bus width for easier electronic routing. I want to evaluate the performance ratio between these 2 design. is that correct ? DDR2 Throughput = 133*2*16 = 4.256 Gbit/s DDR3 Throughput = 533*2*8 = 8.528 Gig/s So the theorical throughput will be multiply by 2. however, what about the real throughput ? Thanks in advance !
Your arithmetic and theoretical numbers are correct.I would put a design together with correct timing constraints and make sure that your DDR3 will actually run at 533 MHz and meet timing. You might also want to get an Arria V devkit and try to run your design on it.
You do need to look at the number of clocks required for a complete memory cycle, the qouted MHz figure is that between the data values during the data transfer burst. I have a gut feeling that the access times for DDR2 and DDR3 are similar.