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Hi All,
I meet with a strange issue that when I did the RTL simulation using Questa Sim in the example project generated by DDR3 IP core, it worked well; but if I simulated the same function in my own project, it was failed with an error: use of reserved cas latency code : 000. All of the settings are the same, and this error seems to be related to the mem_model.sv file. Is there any one troubling with this issue too? My platform: Quartus II 10.1-64bit Questa Sim 10.0a-64bit Thanks!Link Copied
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