Hello,I'm trying to use/adapt the VGA Controller with DMA support (http://www.altera.com/support/refdesigns/sys-sol/computing/ref-niosii-vga.html) . I managed to instantiate the IP core in SOPC builder and to generate the corresponding VHDL files. In the VHDL files I had to manually fix some issues to get it compiled using quartus: (1) The lpm_counter component declaration included in the VHDL code is missing some generics (e.g., lpm_modulus) and therefore Quartus fails to instantiate the lpm_counter when these parameters are used. I solved it be removing the lpm_counter component declaration and adding "use lpm.lpm_components.all;" instead. Maybe someone from Altera should have a look on that. My impression is that this might have remained uncovered since this problem does not show up when using Verilog instead of VHDL. (2) In the process where the sync_n signal is generated, there is an XNOR (~^) in the Verilog code which is not properly handled when generating VHDL code. I had to manually fix that. After those fixes I got the code to compile. In the pin planner I then did the wiring (R, G, B, VS, HS, VGA_CLK, blank) and then downloaded the code to the DE2 board. In the NIOS IDE I wrote some sample code using the provided simple graphics lib that draws some points and lines. In principle the VGA seems to work. BUT there still is something wrong: The coordinate origin seems to be not in one of the four corners of the screen. When drawing e.g., a line (hstart=0, hend=640, vstart=0, vend=0) then the lines appears somewhere in the right third of the screen going form top to bottom. Additionally, when drawing consecutive frames where only e.g., the vend of the line is gradually extended the consecutive pictures seem to "jump" - as if the origin is in a different place every time. The cube rotation demo included with the VGA controller code essentially results in lots of screen flickering and there hardly can be seen something sensible on the screen. Observing this behavior I'm now in doubt if the VGA code (which originally was written to be used with a different VGA DAC) can be used with DE2 board. Notably, the M1, M2 and sync_n and sync_t lines going to the DAC on the lancelot seem to have no equivalent on the DE2 DAC. In general I would have thought that the VS, HS, BLANK and CLK lines plus R, G, B should be sufficient. Am I missing here something? Maybe someone from Altera could help me with this one. Having VGA with DMA access on the DE2 board would be really cool. Thank you, Thomas
As I can remember, there are demo project based on the VGA provided with the DE2 board design files. Maybe you can just check them out and compare with yours.
can anyone send me a vhdl code to display an image from memory (SRAM i guess) through the DE2 VGA interface? its urgent and matter of fail and get your *** kicked or stay alive and continue your study. I am new to this VHDL and FPGA stuff but this course is compulsary and I ahve to take it otherwise I will never get close to it so forgive me for the demand but please help me as soon as possible. email@example.com
hi.. i would like to ask how to get a VGA Controller with DMA.. so far i just got a VGA controller in my SOPC Builder. Must i download something in order for the VGA Controller with DMA to be appeared?