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DPA Initial Phase in ALT_LVDS_RX core means what?

Altera_Forum
Honored Contributor II
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Hi all. 

 

I want to know that the setting about dpa_initial_phase (value:0 45 90 135 180 225 270 315 360) means the DPA circuit block will select a fixed shift phase(dpa_initial_phase) to sample rx data from alt_lvds_rx or DPA will select a better phase clock to sample rx data...?  

Does anyone know something about dpa_initial_phase setting ? Please share it to me . 

Thank you!:) 

 

pofeng
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Altera_Forum
Honored Contributor II
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I think it's where it starts for calibration, but since it dynamically changes it doesn't really matter. Every DPA I've seen leaves the default.

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Altera_Forum
Honored Contributor II
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I think if you knew the relationship between clock and data(many cases you don't), you could have it start in a selection that's correct. Maybe that reduces the DPA lock time? Not sure.

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