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DSP tutorial parameter problem

Altera_Forum
Honored Contributor II
2,114 Views

Hi,  

 

I tried the tutorial in "DSP builder handbook volume DSP builder standard blockset". When trying to edit the parameters for the SinIn Block, I get an error message that says : 

" S-function parameter count mismatch. S-function 'sInOut' in 'untitled/Input' is expecting 0 parameters while 8 were provided in the dialog box." 

 

What could be the problem? 

Please help.. 

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Altera_Forum
Honored Contributor II
1,059 Views

This usually happens when something else has already gone wrong. If you look in the MATLAB console window can you see any other error messages?

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Altera_Forum
Honored Contributor II
1,059 Views

 

--- Quote Start ---  

This usually happens when something else has already gone wrong. If you look in the MATLAB console window can you see any other error messages? 

--- Quote End ---  

 

 

There were some messages on the MATLAB console window, but now the same message doesnt appear anymore ,instead for some unknown reason, I have: 

" MATLAB error message: Unexpected Standard exception from MEX file. What() is:Exception thrown by JniStubs : java.lang.NullPointerException"  

 

and  

 

"Error in 'untitled/comparator' (matlab:das_dv_hyperlink('das','mdl','untitled/comparator')) while executing C MEX S-function 'sGeneric', (mdlInitializeSampleTimes), at time 0." when I try to simulate my model. 

 

On the MATLAB console window I get: 

 

"Warning: The model 'untitled' does not have continuous states, hence 

Simulink is using the solver 'VariableStepDiscrete' instead of solver 

'ode45'. You can disable this diagnostic by explicitly specifying a 

discrete solver in the solver tab of the Configuration Parameters 

dialog, or by setting the 'Automatic solver parameter selection' 

diagnostic to 'none' in the Diagnostics tab of the Configuration 

Parameters dialog." 

 

Here is the attached model file...I dont know what to do...Is the DSP builder installation corrupt?
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Altera_Forum
Honored Contributor II
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Your design is invalid as you haven't delimited the synthesizable part of your design from the non-synthesizable part (i.e. your testbench). You need to add DSP Builder Input and Output blocks around the synthesizable part. 

 

Chapter 2 of http://www.altera.com/literature/hb/dspb/hb_dspb_std.pdf (http://www.altera.com/literature/hb/dspb/hb_dspb_std.pdf) should help.
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