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Data on FIFO RX of TSE MAC doesn't match with data on RGMII RX

Hi guys,

 

I have set up a design with two TSE MAC's and trying to send data from the first MAC to the second MAC. But somehow the data gets corrupted on the first TSE MAC and doesn't appear as it should be on the FIFO_RX interface.

The data that I provide on the RGMII RX in my Testbench appears to be fine in the simulation.

 

I have configured the MAC in RGMII mode in 100MBps.

The register clock, rgmii clock and fifo clocks are set to 25MHz.

 

Could anyone help me out please?

 

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Hello Mdehp, Thank you for posting in Intel Ethernet Communities. What is the Intel product involved? Is this an Ethernet controller embedded into a custom device or an FPGA? Best regards, Daniel D Intel Customer Support Under Contract to Intel Corporation
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Hello Mdehp, Please let us know if you still need assistance with this. Please provide more information about the product involved, so we can provide the correct support. If you have any other questions please let us know. Best regards, Daniel D Intel Customer Support Under Contract to Intel Corporation
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Hi Daniel,

 

Thanks for replying, I am using the Intel Triple-Speed Ethernet IP for the two MAC's. So yes it's an Ethernet controller.

I have already solved the problem with the FIFO, it was something with setting the registers of the TSE MAC.

 

I do have another question

I am trying to upload this design on my MAX10 FPGA. Do you know if i could leave out the PHY configuration in RGMII mode so the TSE MAC would use auto negotiation to communicate to the PHY?

For now I got only one Ethernet port working, by using the "MAX 10 Single-Port Triple Speed Ethernet and On-Board PHY Chip Design Example User Guide"

 

Regards,

Mansur

 

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Hello Mdehp, Thank you for the information. Since the product is an FPGA this is not something that Intel Ethernet Communities supports. Would you be able to make a new thread under the FPGA topic? That will be the fastest way to get support. We can redirect the thread, but it may take some time for the FPGA team to reply. Please let us know which option is preferred. Best regards, Daniel D Intel Customer Support Under Contract to Intel Corporation
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Hi Daniel,

Ill make a new thread in FPGA topic.

Thanks for the support.

 

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Hello Mdehp, Thank you for the reply. Hopefully FPGA Communities will provide a quick answer. Best regards, Daniel D Intel Customer Support Under Contract to Intel Corporation
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