- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I tried to run STAP Steering generation reference design in dsp builder, its a flaoting point design, for using signal compiler I had to put a data type converter to change the format of fixed point inputs to floating point. but when I ran the quartus project I faced this error for this command in data type conversion subsystem :
q <= real(to_integer(signed(a))) / 1.0; Error (10327): VHDL error at STAP_steeringGen_Subsystem_Data_Type_Conversion1.vhd(52): can't determine definition of operator ""/"" -- found 0 possible definitions can enyone help me? thanksLink Copied
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
real types are not appropriate in quartus, as they are not synthesisable. They re for simulation only.
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Well advanced blockset does generate floating point hardware, but its does the arithmetic by thinking about the exponent and mantissa bits explicitly. As Tricky says, the 'real' type in VHDL is for simulation; It's not supported in Quartus, and it's not how we generate hardware. The Advanced block-set has data type conversion blocks; to reinterpret floating point signals built and using in DSP Builder Advanced designs as a bit pattern of mantissa, exponent, sign etc.. at the boundaries for example when passing a 32bit IEEE single precision number to DSP Builder. I suggest you use these convert blocks, rather than trying to do the convert yourself. Also Altera doesn't synthesize / as divide - I don't think that's legal syntax.
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page