Display port video data input interface issue

[SYang9]

Hi Sir,

Customers have the video data interface of DP IP issue about the Hsync & Vsync state.

Documentation describes that user can use standard Hsync and Vsync as the video data input source format 

but don't provide the detail information. 

Customers inquired the every interval of Hsync signals whether can have different latency .

They want to add more than 3 or 5 cycles between Hsync signals at the last video line before the next frame image .

https://www.intel.com/content/www/us/en/programmable/documentation/hco1410462777019.html

Thanks​

[Deshi_Intel]

HI,

DP IP doesn't process video data, it just transfer the video data through physical medium like transceiver channel.

For digital video timing requirement, you may want to check other spec like CTA spec. For instance, CTA-861 spec

Thanks.

Regards,

dlim

[Deshi_Intel]

Hi,

I have not hear back from you for 2 months. Hopefully my debug suggestion help out and you are able to make progress with your project.

For now, I am setting this case to closure.

Thanks.

Regards,

dlim