DisplayPort RX to 3GSDI TX

[ACont16]

Hi!,

i am looking for a fpga ip-core based solution for a possible DisplayPort yto 3g-SDI converter. Can you, kindly suggest me which ip-cores cn be used to do this?

thank you so much!

Aldo

[Deshi_Intel]

HI,

Sorry but Intel FPGA doesn't has the converter IP design.

Intel only has separate DisplayPort IP and SDI II IP as below. User is expected to build their own conversion logic.

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_displayport.pdf

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/ug/ug_sdi_ii.pdf

Regards,

dlim

[ACont16]

thanks a lot for you answer dlim!

i was looking for a suitable fpga to run both the ip-cores DisplayPort Intel® FPGA IP  and SDI II Intel® FPGA IP. I found the Cyclone V 5CGTFD9E5F35C7 as good candidate to run both the IPs mentioned above.

Considering that i need 8 transceivers with al least 3.2 Gbps  are there any cheaper solutions with respect to the Cyclone V 5CGTFD9E5F35C7?

thank you so much for you help,

Aldo

[Deshi_Intel]

Hi Aldo,

Sorry, I am not familiar with FPGA pricing as this is more on technical support forum.

However, if you don't mind to provide me your contact and also city, country info then I can help to check for local FAE support. Then I can intro you to the FAE where you can further consult on FPGA pricing and selection.

Thanks.

Regards,

dlim

[ACont16]

Hi Dlim,

thenks a lot for your help. We are in Italy, Turin.

[vgs]

It may be a bit overkill for your application but the Clocked video input and Clocked video output in the Intel FPGA video IP suite can be used to bridge between the DisplayPort IP and SDI II IP. The whole video IP suite is worth considering if you have to do some processing in the middle and also need things like color space conversion, chroma resampling, frame rate conversion, change of dimensions, gamma conversion. ...

[ACont16]

Hi vgs,

thanks for your answer. with

"It may be a bit overkill for your application but the Clocked video input and Clocked video output in the Intel FPGA video IP suite can be used to bridge between the DisplayPort IP and SDI II IP"

are you saying me that the two IPs afore mentioned can not be linked directly? Or better , It is needed to mandory place something (Clocked video input and Clocked video output) between them in order to allow their communication?

[Deshi_Intel]

HI Aldo,

I found the local DFAE for Italy region. You can contact either Arrow or Avnet.

Below is the full link for your reference.

https://www.intel.com/content/www/us/en/partner/where-to-buy/overview.html

Thanks.

Regards,

dlim