I tried to finalize design non GPU mode. doesn't provide non GPU mode example design. I can't figure it out how to connection Transceiver Native PHY Reconfiguration interface signal ( this signal is not in Arria V GX and there is av_xcvr_reconfig IP in Arria V GX). For PHY reconfiguration, I tried to use bitec_reconfig_alt_c10.
Can you advice PHY reconfiguration signal connection on non GPU mode?
My understanding is GPU mode vs none-GPU mode should only affect DisplayPort IP DPCD setting and shouldn't affect transceiver design connection.
Have you looked into DisplayPort GPU mode example design to study the transceiver connection ?
With refer to my previous post update and attached screenshot, I do see DP Rx CPU bus is removed when GPU mode is turned off in Quartus Pro v20.1
Are you seeing different result than me ?
I knew I got the same result in non GPU mode on DP core. My question is not DP core. Transceiver reconfiguration connection has GPU bus.
How to connection this three files in non CPU mode ?
bitec_reconfig_alt_c10.v, xcvr_reconfig_arbiter.sv, av_native_phy_rx.ip.
and where is .mif file or no need .mif file ?
Ok, I understand your confusion now.
Just to clarify, those transceiver reconfiguration bus are not GPU port and has nothing to do with DisplayPort GPU mode.
In C10 GX DP example design, the dynamic reconfiguration control RTL state machine coding design is located in bitec_reconfig_alt_c10.v and xcvr_reconfig_arbiter.sv as you mentioned.
The difference between DP IP Rx GPU mode on/off is as below
So whether DP Sink IP GPU mode is off or on, it shouldn't affect your transceiver channel connection. I visualize the system design connection as below
I understand GPU mode on/off function clearly.
I look at bitec_reconfig_alt_c10.v It doesn't have .mif file reading function.
If I need more information , I will let you know.
Thank you again