FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
The Intel sign-in experience has changed to support enhanced security controls. If you sign in, click here for more information.
6118 Discussions

Does intel's altera_avalon_i2c IP support clock stretching?

iDirect_Martin
349 Views

I want to use the IP in a PMBus master. Looking at the IP's literature I cannot ascertain that it does or doesn't support clock stretching.

I'm currently using Quartus Prime Standard 20.1.

 

Has anyone used it for PMBus mastering?

Does anyone know if clock stretching is supported?

 

Cheers,

0 Kudos
1 Solution
RichardTanSY_Intel
254 Views

The I2C Master Core IP supports clock stretching by default. 

Do make sure that the SCL and SDA set to be bidirectional IO.


View solution in original post

3 Replies
RichardTanSY_Intel
255 Views

The I2C Master Core IP supports clock stretching by default. 

Do make sure that the SCL and SDA set to be bidirectional IO.


RichardTanSY_Intel
241 Views

I’m believe I have address your question. With that, I will now transition this thread to community support. If you have a new question, feel free to open a new thread to get the support from Intel experts. Otherwise, the community users will continue to help you on this thread. Thank you.


Best Regards,

Richard Tan


p/s: If any answer from the community or Intel support are helpful, please feel free to give Kudos. 


Reply