FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5982 Discussions

Error While generating HDL code using Standard and Advanced Blockset

Honored Contributor II

I have tried using Standard Blockset with Advanced Blockset COmbined. 

First Question is 

1) Whether I need to have HDL Coder for this ? 


I am referring to 3-4 section in this document https://www.altera.com.cn/content/dam/altera-www/global/zh_cn/pdfs/literature/ug/ug_dsp_design_flow....  

I just attached the Basic Design of what I am trying. 

I just gave Input and Output connected. I used Standard and Advanced Blockset, the Simulation is running and I am getting expected Output (3.5 here).  

But When I am trying to generate HDL code using this Signal Compiler, I am having below trouble. 


Matlab Error : 

Error using alt_dspbuilder_mdl2xml (line 63) 

Java exception occurred:  

com.altera.dspbuilder.common.DSPBuilderException: java.io.FileNotFoundException: D:\rtl\NewModel\NewModel_Adv_Blk___entity.xml (The system cannot find the file specified) 

at com.altera.dspbuilder.simulation.templates.XMLParser.loadDocument(Unknown Source) 



The error I am getting is NewModel_Adv_Blk___entity.xml file is not specified, but NewModel_Adv_Blk_entity.xml is generated.  

I am not understanding why there are three underscores (___) in before entity. 

Can you please help me this. Am I doing anything wrong in Procedure.
0 Kudos
1 Reply
Honored Contributor II

what version of DSP builder and Matlab that you use? U need to ensure the version is compatible. Besides, did you able to run the example design that build for combined blockset?