FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Announcements
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5982 Discussions

Error in Altera 10Gbps MAC documentation

Altera_Forum
Honored Contributor II
759 Views

The description field of register tx_preamble_control (byte offset 0x4400) reads incorrectly. It reads as if there are two control bits, instead of one.

0 Kudos
0 Replies
Reply