FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6020 Discussions

Error when generating DDR3 Uniphy IP for Cyclone V SoC

mzannerni
Beginner
160 Views

Hello,

 

I am getting the attached error when generating DDR3 Uniphy IP.

I didn't happen on version 13.0 but happened on 14.1 and 18.1

 

Any advice on this issue is appreciated..

 

Thanks,

mzan

0 Kudos
2 Replies
AdzimZM_Intel
Employee
144 Views
AdzimZM_Intel
Employee
106 Views

Hi mzan,


Do you have any update on this topic?


Regards,

Adzim


Reply