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Honored Contributor I
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FIR COMPILER 7.1 sp1 Multiple Rate

I've 2 problem with a design involving Multiple Rate filters and precisely: 

PROBLEM 1) 

It seems that after a bit ast_source_ready go low. 

The fir is a 2 interpolator working with a clock 8Fs with multicyle factor of 4. 

I mean I've data at a sample rate Fs, but the fir that in sigle rate shall give me data at 2Fs has an 8Fs clock. 

So I've to give it the same data for 4 8Fs clock cycle (8Fs/4 = 2Fs that is the rate of the filter output). 

The answer is.. where should be the Fir Input data valid (ast_sink_valid)? 

 

In single rate filter on Altera datasheet the valid is on the last clock of the data in. 

I mean if I should have a single rate 2 interpolator filter I should have something like that: 

 

Data D0 D0 D1 D1 

Valid 0 1 0 1  

 

But on Multirate filter seems to me that Valid should be on the beginning. 

 

I've tried and nothing changes.. 

 

 

2) Cascading Filters. 

 

Let's have 2 FIR one after another. 

Call them 

 

FIR1 ----> FIR 2 

 

 

My question is:  

ast_source_rdy on the left port of FIR 1 shall be equal to ast_sink_rdy of the right port of FIR2? 

 

Answer: yes is exactly as I've stated before 

 

Thanks in advice. 

 

Marco
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