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SFava
Novice
1,442 Views

FIR II IP: issue with coefficient address width generation.

Hello,

 

I am working with the FIR II IP core and set up the core to have two coefficient banks.

The address space generated by qsys in contiguous and accommodates all required coefficients.

 

In my particular case I selected the symmetrical FIR, which means that only CEIL(num_of_taps) should be written into coefficient bank.

 

TEH ISSUE:

The tool does not properly generate the address width when the number of the required coefficients are a power of 2 plus one.

 

In the files in attachment I write down few banks examples, namely for the 17 / 33 / 19 taps cases.

Where only the 19 taps generates the correct coefficient address width.

 

How to reproduce:

Please open the fir_tdm.qsys file in Quartus 17.0 and load the coefficients from the "debug_coeff.txt" file (un/comment to test the various tap cases).

 

Hint for developers:

The formula the address width should be based on should be:

CEIL(LOG2(CEIL(num_of_taps/2)*num_of_banks))

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4 Replies
CheePin_C_Intel
Employee
82 Views

Hi Samuele, Thanks for highlighting this. Please allow me some time to look into your attachment and perform issue replication. I will update you on the progress by mid of next week or as soon as there is any valid finding. Please ping me if I do not get back to you. Thank you.
CheePin_C_Intel
Employee
82 Views

Hi Samuele, Thanks for sharing the files and steps to replicate the issue. I have performed some tests on my sides and able to replicate your observation. As you mentioned, seems like when the number of coefficient is (2^x + 1), the number of address bit will be lacking of 1 bit. I have tested with Q18.1 and observe similar behavior. For your information, I have filed a case to Engineering to further look into this and for future fixes. To avoid gating your progress, as a workaround, I would like to recommend you to avoid using the number of coefficient = (2^x + 1). Sorry for the inconvenience. Please let me know if there is any concern. Thank you. Best regards, Chee Pin
SFava
Novice
82 Views

Thank you for the fast answer.

Yes, meanwhile I already increased the order of the FIR to avoid it.

 

Cheers,

Samuele

CheePin_C_Intel
Employee
82 Views

Thank you for your understanding and sorry for the inconvenience.
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