FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
Intel Support hours are Monday-Fridays, 8am-5pm PST, except Holidays. Thanks to our community members who provide support during our down time or before we get to your questions. We appreciate you!

Need Forum Guidance? Click here
Search our FPGA Knowledge Articles here.
5918 Discussions

Floating point addition using ALTFP_ADD_SUB core

Honored Contributor II

I am having an issue while using the Altera's floating point adder.... 


while performing addition or subtraction between a subnormal and a normal number, altera's core treats all subnormal numbers as zero so it always outputs the normal operand. This is true if we add a larger normal number with a subnormal number but for a normal number which is very close to the subnormal range, we have significant amount of error 


For example  


if 4.778436e-39 (a subnormal) is added with 2.458775e-37(a normal) 

Output from Altera's core 2.45877e-37  

While the actual answer is 2.506560e-37 


Anybody knows if there is any exception in IEEE754 Floating Point standard regarding subnormal and normal addition/subtraction ????
0 Kudos
1 Reply
Honored Contributor II

At a guess that is an 'optimisation' (or maybe a bug) in the VHDL to avoid the extra comparator and shifter/mux required to process the subnormal value. 


Support for subnormal values as well as INF, NaN, -0 and the rounding rule(s) could be logic saving options for any FP unit.