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Altera_Forum
Honored Contributor I
734 Views

Frame Reader - How has some experience?

Dear all, 

I understand the Frame reader VIP suite component is a kinda new comp so it is difficult to find some examples on web. 

But i see from posts on this forum some folks have already tried to use it. 

 

I've started my development and not able to run it. 

Just wounder how everything should be organized. 

In the SOPC builder I simply have: Nios, oncip_mem, jtag, timer - this is Avalon-MM. Avalon-ST is only Frame Reader-> Clocked video output. 

Previously I used Test Pattern Generator instead of the Frame Reader and i can see the image on the monitor. i use only one clock - vip_clk. 

 

I just want to write a small picture (40x40) to the on_chip memory and see it on the monitor. 

 

1. What is the simpler way to write raw picture to the on-chip memory? I have a program called GIMP2 which is able to convert from jpg, bmp to rgb, and i can create a C++ array of the rgb bits. 

I'm not a C specialist so it is good if it is possible just simply to copy an array of rgb from a file to the memory. 

Does anyone can give a simple C code and picture for my reference? 

 

2. What parameters should I specify for the VIP frame reader component? 

I have progressive video (DVI), 3 colors in parallel, 8-bit color. 

Master port width - 64. 

Picture is 40x40 

Now I have the following but this doesn't work for me: 

IOWR(ALT_VIP_VFR_0_BASE, 0x3, 0x0); // IOWR(ALT_VIP_VFR_0_BASE, 0x4, DISPLAY_MEMORY_BASE); // frame address in the on chip memory // 800/1600 - they are the values which work IOWR(ALT_VIP_VFR_0_BASE, 0x5, 800); // numbers of reads from master port for whole frame= 40*40*3*8/48 =800 !!! IOWR(ALT_VIP_VFR_0_BASE, 0x6, 1600); // number of pixel IOWR(ALT_VIP_VFR_0_BASE, 0x8, 40); // IOWR(ALT_VIP_VFR_0_BASE, 0x9, 40); // IOWR(ALT_VIP_VFR_0_BASE, 0x0, 0x1); // start frame reader frame_reader_status = IORD(ALT_VIP_VFR_0_BASE, 0x1);  

 

Maybe the problem is in how i write the picture to the memory? 

i appreciate if somebody can give me some suggestions. 

Thanks, 

U. 

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2 Replies
Altera_Forum
Honored Contributor I
51 Views

I am also having the same problem. I can see the test pattern but I cant get the frame reader to work. Did you manage to solve this?

Altera_Forum
Honored Contributor I
51 Views

 

--- Quote Start ---  

I am also having the same problem. I can see the test pattern but I cant get the frame reader to work. Did you manage to solve this? 

--- Quote End ---  

 

 

Ahh, it was very long time ago, but anyway..... 

 

The problem was in the DDR memory access. 

FR reads line-by-line. It almost doesn’t matter how many lines it have to read but in the case of the reads within the line (pixels) FR is very sensitive to the “number of read through the master port”. 

The master port width of the Frame reader should be set to 128 bit if the ddr local interface is 128 bit. 

The calculation of the Frame Words (address 5) - use this formula: if the interface is 128 bit and single color pattern is 24 bit " (int) float(Width*height)/5". It divide by 5 is because the 128 bit memory interface each time can read out 5 single color pattern( 24 bits). 

 

 

I have the following working : 

 

IOWR(FRAME_READER_BASE,0x8,1600); // size x 

IOWR(FRAME_READER_BASE,0x9,100); // size y 

IOWR(FRAME_READER_BASE,0x3,0x0); // page 0 only used 

IOWR(FRAME_READER_BASE,0x4,frame_reader_in_ddr2_bot); // starting address of frame 

IOWR(FRAME_READER_BASE,0x5,32000); // number of reads through master port = width*hi/5 

IOWR(FRAME_READER_BASE,0x6,160000); // number of pixels 

 

Regards, 

uilka_b
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