Hi all i'm trying to interface the Micron MT25QL512 Flash device by using the Altera Generic Quad SPI controller.
I'm using the Cyclone V SOC.
When i try to access the Memory Avalon slave it seems that the interface works fine. i can write and read back the written data (even after power down and power up). When i try to access the CSR registers i can read the RD_DID and other registers but specificily when i try to write to the MEMORY_OP register (address 0x3 in CSR) the instance assersts the Waitrequest and kind of stucks on it.
i configure the IP to the flash that im try to interface with and in standard mode.
in the board, the flash is connected to the FPGA as follows:
DQ0,DQ1- connected to the FPGA through a 20ohm resistor
DQ2 - has a 10kohm pullup resistor and connected to the FPGA through a 20ohm resistor.
DQ3 - connected to the FPGA through a 20ohm resistor.
did any one seen his kind of scenario?
p.s. originally i worked in Quartus 16.1, i tried to downgrade to 15.1 (i succesfully worked with this IP in the past in this version) and even upgraded to 18.1 but still it acts the same.
the clock is 25MHz. the SPI baud rate is not configurable (with the help of a scope ive seen the clock frequency is 25[MHz] also.
meanwhile ive noticed that in version18.1 there is a new IP called Generic Quad SPI II Controller. tried to use this IP and when i access the MEMORY_OP register now it doesnt stuck.. but it still not erasing the sectors i want to erase.
sorry but when you say step what do you mean? what do i write?
i write to address 0x3 (0xC from the master) the data 0x2, which is to erase sector 0 as far as i understand... i tried to write 0x4 and then 0x2 (write enable and then erase) but still doesnt work.
May I know what is the I/O mode used in your IP? Have tried to change the I/O mode of the IP?
Have you tried to performed Sector Protect to make sure that the sector protect is not enabled?
Have you tried to read the "FLASH_RD_STATUS" from the IP after performing sector erase?
What is the IP that you are using as the Avalon Master? Have you tried to use SignalTap to tap the Generic Quad SPI Avalon interface to see if you are having the correct timing?