FPGA Intellectual Property
PCI Express*, Networking and Connectivity, Memory Interfaces, DSP IP, and Video IP
6224 Discussions

Getting started with a 3 port ethernet design

Honored Contributor II

I am looking for any links and references to get started designing the following: 


Source Synchronous Parallel data input 

UDP packetized output to 3 locations @ 1000mbps 


I believe my setup will get me there with some work but any references would be helpful to figure this out. 


Cyclone IV GX dev kit with HSMC Dual port gigabit adapter 


I assume I'll need to make use of TSE MAC and Nichestack IP. 


My plan is to fill a buffer with the parallel data and output a UDP packet when the buffer fills to a predetermined number of bytes. Any app notes I should read, any pitfalls to watch out for? 


0 Kudos
0 Replies