HDMI TX IP - PLL settings

[ldm_ra]

Hi All,

I'm about the HDMI IP for Cyclone 10 GX...

Where can I find the PLL Settings for HDMI as TX? I'm looking for the N, M, and L parameters for the HDMI TX PLL. Where can I see their addresses, allowed values, etc? Where can I see a drawing of the PLL?

Thank you!

[Deshi_Intel]

Hi,

May I know why are you interested with the internal parameter setting insides Intel FPGA PLL IP ?

• These are internal parameter processing by the PLL IP where byright user just needs to specify the desired clock frequency setting then PLL will auto calculate and configure these internal parameter setting automatically

If you would like to find out more about the clock frequency setting of PLL IP clocking HDMI Tx IP then feel free to generate the example design from HDMI IP GUI and check it out.

Thanks.

Regards,

dlim