Hi,
Thanks for your clarification. As I understand it, you are looking for example design with 16 bit interface-width Native PHY with 8b10b encoding enabled and manual alignment.
For your information, I have search into our data base and found the following simulation example which was previously available in wiki which might be helpful for you to have a quick start. I have sent the ZIP to you at your email. The following are some description of the example design for your reference:
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Cyclone V Native PHY with manual alignment, 8b10b enabled and byte ordering in single width mode design example
This basic design example with Modelsim simulation demonstrates the implementing of Cyclone V Native PHY with manual alignment, 8b10b enabled and byte ordering in single width mode. The purpose of this design example is to assist users to have quick start with the Cyclone V transceivers. The design also come with example test bench and TCL file to run simulation in Modelsim for reference. The design consist of only one transceiver channel with fixed 16 bits data pattern. In the test bench, the MSByte and LSByte of the data pattern are purposely swapped half way during simulation to show the byte ordering occurrence in case the correct byte ordering has been achieved directly after word alignment. Note that you should create your word alignment and byte ordering controller as the controls are done in test bench in the example.
To run the simulation, do the following:
1. Unzip the files
2. Change the Modelsim directory to the unzipped folder
3. Type "source simulation_setup.tcl"
4. Type "ld" to compile
5. Type "simulate" to start simulation
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Please let me know if there is any concern. Thank you.
